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PM7341 Datasheet(PDF) 119 Page - PMC-Sierra, Inc |
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PM7341 Datasheet(HTML) 119 Page - PMC-Sierra, Inc |
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119 / 413 page ![]() PRELIMINARY INVERSE MULTIPLEXING OVER ATM PM7341 S/UNI-IMA-84 DATASHEET PMC-2000223 ISSUE 4 INVERSE MULTIPLEXING OVER ATM PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 121 be independently configured to be provisioned (contain valid data) or unprovisioned. The RCAS performs a table lookup to assign the provisioned time-slots to a virtual link. After the selected timeslots are grouped into a virtual link, virtual links are referred to as links. This look-up should be used to remove byte 16 of the E1 frame, since byte 16 contains signaling data not ATM data and is also used to implement a fractional T1 or E1. The first bit of time-slot 1 of a channelized link is identified by noting the absence of the clock and its re- activation. Links may also be unchannelized. In this mode, all data is assumed to be valid ATM data. The link clock is only active during bit times containing data to be processed and inactive during bits that are to be ignored by the RCAS, such as framing and overhead bits. The RCAS provides diagnostic line-side loopback that is selectable on a per- channel basis. When a channel is in diagnostic loopback, data on the received links originally destined for that channel is ignored. Transmit data of that channel is substituted in its place. 10.6 Microprocessor Interface The Microprocessor Interface Block provides the interrupt logic and an interface to normal-mode registers contained within the design blocks. The normal mode registers are required for normal operation. 10.6.1 Mapping and link identification Within the clock/data interface, the external links are mapped to a contiguous space identified as Virtual Links. To support multiple fractional TC flows on a single external signal, a mapping is used to split a single channelized external signal into multiple Virtual Links. At the per-link FIFOs, the clock/data Virtual Link naming convention is replaced 1:1 with the Physical Link naming convention. The S/UNI-IMA-84 processes 84 Physical Links, numbered 0 to 83. Each line interface uses a different Link naming convention, based on the nature of the interface: the SBI Interface uses three SPEs, each carrying 28 Tributaries, and the Clock and Data Interface uses 32 External Signal pins, which are mapped to 84 Virtual Links. In both cases, the 84 streams to/from the line interfaces are referred to a Physical Links elsewhere inside the device. |
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