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PM7341 Datasheet(PDF) 116 Page - PMC-Sierra, Inc |
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PM7341 Datasheet(HTML) 116 Page - PMC-Sierra, Inc |
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116 / 413 page ![]() PRELIMINARY INVERSE MULTIPLEXING OVER ATM PM7341 S/UNI-IMA-84 DATASHEET PMC-2000223 ISSUE 4 INVERSE MULTIPLEXING OVER ATM PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 118 This is to enable the IMA to perform a fast recovery from error conditions. An OCD event will result in a loss of IMA frame sync to ensure differential delay checking is performed. 10.5 Line Side Physical Layer The S/UNI-IMA-84 must be configured to support one of either the SBI interface or the 32 Clock and Data interface. 10.5.1 TX Clock/Data (TCAS) The S/UNI-IMA-84 supports up to 32 2-pin Clock/Data serial interfaces to interface with standard framers. Each link is independent and has its own associated clock. To enable easier support of CTC, a common clock is also supported using the CTSCLK pin. The S/UNI-IMA-84 responds to the active edge of each transmit clock by generating a single bit. When the external framer needs to insert transmission overhead (such as framing bits) into the data stream provided by the S/UNI-IMA-84, the framer is required to gap the transmit clock provided to the S/UNI-IMA-84. This will prevent the S/UNI-IMA-84 from outputting data bits during the overhead bit period(s). The Transmit Channel Assigner block (TCAS) processes up to 32 virtual links. Data for all links is sourced from a single byte-serial stream from the TC layer. For each link, the TCAS provides a holding register. The TCAS also performs parallel-to-serial conversion to form a bit-serial stream. When multiple links are in need of data, TCAS requests data from upstream blocks on a fixed priority basis with link TSDATA[0] having the highest priority and link TSDATA[31] the lowest. Links containing a T1 or an E1 stream may be channelized. Data at each time- slot may be assigned either: (1) to be sourced from the virtual link or (2) to be unassigned. This mechanism of assigning timeslots enables support of fractional links. The link clock should only be active during time-slots 1 to 24 of a T1 stream and inactive during the frame bit. Similarly, the clock is only active during time- slots 1 to 31 of an E1 stream and inactive during the framing byte. The first bit of time-slot 1 of a channelized link is identified by noting the absence of the clock and its re-activation. With knowledge of the transmit link and time-slot identity, the TCAS performs a table look-up to identify which timeslots are in use. Links may also be unchannelized. In that case, all data bytes on that link belong to the virtual link. The TCAS performs a table look-up to identify the link to which |
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