PM7375-SC datasheet(115/430 Pages) PMC

115 / 430 page

PM7375 LASAR-155

DATA SHEET

PMC-931127

ISSUE 6

LOCAL ATM SAR & PHYSICAL LAYER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

NORMAL MODE REGISTER DESCRIPTIONS

Normal mode registers are used to configure and monitor the operation of the

LASAR-155. Normal mode registers can be one of three types, Selectable Master

registers, Microprocessor Only Access registers and PCI Host Only Access

registers. Register description types are described above in the Microprocessor and

PCI Host Register Memory Map section. When using the microprocessor interface,

normal mode registers (as opposed to test mode registers) are selected when TRS

(A[8]) is low.

Notes on Normal Mode Register Bits:

1. Writing values into unused register bits has no effect. However, to ensure

software compatibility with future, feature-enhanced versions of the product,

unused register bits must be written with logic zero. Reading back unused bits

can produce either a logic one or a logic zero; hence unused register bits should

be masked off by software when read.

2. All configuration bits that can be written into can also be read back. This allows

the processor controlling the LASAR-155 to determine the programming state of

the block.

3. Writable normal mode register bits are cleared to logic zero upon reset unless

otherwise noted.

4. Writing into read-only normal mode register bit locations does not affect

LASAR-155 operation unless otherwise noted.

5. Certain register bits are reserved. These bits are associated with megacell

functions that are unused in this application. To ensure that the LASAR-155

operates as intended, reserved register bits must only be written with their

default values. Similarly, writing to reserved registers should be avoided.

PM7375-SC Datasheet(PDF) 115 Page - PMC-Sierra, Inc