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PM7375-SC Datasheet(PDF) 177 Page - PMC-Sierra, Inc |
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PM7375-SC Datasheet(HTML) 177 Page - PMC-Sierra, Inc |
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177 / 430 page ![]() PM7375 LASAR-155 DATA SHEET PMC-931127 ISSUE 6 LOCAL ATM SAR & PHYSICAL LAYER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 161 the RACP ignores the bytes in the two stuff columns. When FSEN is set to logic zero, the RACP assumes the entire SPE contains ATM cell payload. RGFCE[3:0]: The receive GFC enable bits, RGFCE[3:0], determine which generic flow control bits are presented on the RGFC. RGFCE[3] corresponds to the most significant GFC bit (first bit in the cell). If a RGFCE bit is a logic 1, the RGFC output changes in the appropriate bit location to the state of the associated GFC bit in the current cell; otherwise, RGFC remains in its current state. Reserved: The reserved bit must be programmed to logic one for proper operation. |
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