TMPR3911 datasheet(206/462 Pages) TOSHIBA

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Chapter 8 Interrupt Module

8-6

CHIININTA:

Issues an interrupt whenever a valid CHI input sample is available from CHI RX Holding

CHIININTB:

Issues an interrupt whenever a valid CHI input sample is available from CHI RX Holding

CHIACTINT:

Issues an interrupt whenever CHICLK is active. This is used for CHI wakeup purposes.

CHIERRINT:

Issues an interrupt whenever a CHI error is received. This interrupt is triggered if CPU or DMA

reading of the CHI RX Holding Registers does not keep up with the hardware filling of the CHI

RX Holding Registers or if CPU or DMA writing of the CHI TX Holding Registers does not keep

up with the hardware emptying of the CHI TX Holding Registers.

SND0_5INT:

Issues an interrupt whenever the sound DMA buffer pointer has reached the halfway point.

SND1_0INT:

Issues an interrupt whenever the sound DMA buffer pointer has reached the end-of-buffer point.

TEL0_5INT:

Issues an interrupt whenever the telecom DMA buffer pointer has reached the halfway point.

TEL1_0INT:

Issues an interrupt whenever the telecom DMA buffer pointer has reached the end-of-buffer

point.

SNDDMACNTINT:

Issues an interrupt each time the sound DMA buffer pointer is incremented, which occurs

whenever a new sound sample is read from and/or written to the sound DMA buffer.

TELDMACNTINT:

Issues an interrupt each time the telecom DMA buffer pointer is incremented, which occurs

whenever a new telecom sample is read from and/or written to the telecom DMA buffer.

LSNDCLIPINT:

Issues an interrupt whenever the amplitude of the left channel sound data is clipping the codec

A/D converter for SIB subframe 1.

RSNDCLIPINT:

Issues an interrupt whenever the amplitude of the right channel sound data is clipping the codec

A/D converter for SIB subframe 1.

TMPR3911 Datasheet(PDF) 206 Page - Toshiba Semiconductor