PCM5142 datasheet(52/123 Pages) TI2

52 / 123 page

PLL

Master Mode

BCK Integer

Divider

Master Mode

LRCK Integer

Divider

LRCK OUT

BCK OUT

NEW

AUDIO

SCK

NON AUDIO SCK

GPIOx

GPIOy

SCK

BCK

LRCK

PCM5141, PCM5142

SLAS759B – AUGUST 2012 – REVISED JANUARY 2016

www.ti.com

8.3.6.7 Clock Master from a Non-Audio Rate Master Clock

The classic example here is running a 12-MHz Master clock for a 48-kHz sampling system. Given the clock tree

for the device (shown in Figure 65), a non-audio clock rate cannot be brought into the SCK to the PLL in master

mode. Therefore, the PLL source must be configured to be a GPIO pin, and the output brought back into another

GPIO pin.

Figure 67. Application Diagram for Using Non-Audio Clock Sources to Generate Audio Clocks

The clock flow through the system is shown in Figure 67. The newly-generated SCK must be brought out of the

device on a GPIO pin, then brought into the SCK pin for integer division to create BCK and LRCK outputs.

NOTE

Pullup resistors must be used on BCK and LRCK in this mode to ensure the device does

not go into sleep mode.

A code example for configuring this mode is provided in the PCM5242 data sheet (SLASE12).

8.4 Device Functional Modes

8.4.1 Choosing a Control Mode

SPI Mode is selected by connecting MODE1 to DVDD. SPI Mode uses four signal lines and allows higher-speed

full-duplex communication between the host and the PCM514x device.

I2C Mode is selected by connecting MODE1 to DGND and Mode2 to DVDD. I2C uses two signal lines for half-

duplex communication, and is widely used in a variety of devices.

Hardware Control Mode is selected by connecting both MODE1 and MODE2 pins to DGND. Hardware control is

useful in applications that do not require on-the-fly device-reconfiguration changes in operating features such as

gain or filter latency selection.

See for a comparison of pin assignments for the 28-pin TSSOP.

8.4.1.1 Software Control

8.4.1.1.1

SPI Interface

The SPI interface is a 4-wire synchronous serial port which operates asynchronously to the serial audio interface

and the system clock (SCK). The serial control interface is used to program and read the on-chip mode registers.

The control interface includes MISO (pin 24), MOSI (pin 11), MC (pin 12), and MS (pin 18). MISO (Master In

Slave Out) is the serial data output, used to read back the values of the mode registers; MOSI (Master Out Slave

In) is the serial data input, used to program the mode registers.

Submit Documentation Feedback

Product Folder Links: PCM5141 PCM5142

PCM5142 Datasheet(PDF) 52 Page - Texas Instruments

PCM5142 Datasheet(HTML) 52 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL