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PCM5142 Datasheet(PDF) 62 Page - Texas Instruments |
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PCM5142 Datasheet(HTML) 62 Page - Texas Instruments |
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62 / 123 page ![]() 3.3V XSMT I2S Clocks SCK, BCK, LRCK 3 ms VDD 0V High Low High Low Time 3.3V XSMT I 2 S Clocks SCK, BCK, LRCK 150t + 0.2ms S VDD 0V High Low High Low Time PCM5141, PCM5142 SLAS759B – AUGUST 2012 – REVISED JANUARY 2016 www.ti.com Recommended Powerdown Sequence (continued) 10.2.3 Planned Shutdown These auto-muting processes can be manipulated by system designs to mute before power loss in the following ways: 1. Assert XSMT low 150 tS + 0.2 ms before power is removed. Figure 80. Assert XSMT 2. Stop I2S clocks (SCK, BCK, LRCK) 3 ms before powerdown as shown in Figure 81. Figure 81. Stop I2C Clocks 10.2.4 Unplanned Shutdown Many systems use a low-noise regulator to provide an AVDD 3.3-V supply for the DAC. The XSMT Pin can take advantage of such a feature to measure the pre-regulated output from the system SMPS to mute the output before the entire SMPS discharges. Figure 82 shows how to configure such a system to use the XSMT pin. The XSMT pin can also be used in parallel with a GPIO pin from the system microcontroller/DSP or power supply. 62 Submit Documentation Feedback Copyright © 2012–2016, Texas Instruments Incorporated Product Folder Links: PCM5141 PCM5142 |
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