ESP32-P4 datasheet(35/93 Pages) ESPRESSIF

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3 Boot Configurations

Table 3-2. Description of Timing Parameters for the Strapping Pins

Parameter

Description

Min (ms)

tSU

Setup time is the time reserved for the power rails to stabilize be-

fore the CHIP_PU pin is pulled high to activate the chip.

Hold time is the time reserved for the chip to read the strapping

pin values after CHIP_PU is already high and before these pins

start operating as regular IO pins.

Strapping pin

VIH_nRST

VIH

tSU

CHIP_PU

Figure 3-1. Visualization of Timing Parameters for the Strapping Pins

3.1

Chip Boot Mode Control

GPIO35–GPIO38 control the boot mode after the reset is released. See Table 3-3 Chip Boot Mode

Control.

Table 3-3. Boot Mode Control

Boot Mode

GPIO35

GPIO36

GPIO373

GPIO383

SPI Boot

Any value

Joint Download Boot2

Any value

1 Bold marks the default value and configuration.

2 Joint Download Boot mode supports the following download methods:

• USB Download Boot:

– USB-Serial-JTAG Download Boot

– USB 2.0 OTG Download Boot (only the USB OTG HS controller can

be used for flashing at FS speed; the USB OTG FS controller does

not support device firmware upgrade)

• UART Download Boot

• SPI Slave Download Boot

3 For details about the functionalities of GPIO37 and GPIO38, see

ESP32-P4 Technical Reference Manual > Chapter Chip Boot Control.

In SPI Boot mode, the ROM bootloader loads and executes the program from SPI flash to boot the

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