ESP32-P4 datasheet(36/93 Pages) ESPRESSIF

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3 Boot Configurations

system.

In Joint Download Boot mode, users can download binary files into flash using USB, UART0, or SPI slave

interface. It is also possible to download binary files into L2MEM and execute them from L2MEM.

In addition to SPI Boot and Joint Download Boot modes, ESP32-P4 also supports SPI Download Boot mode.

For details, please see ESP32-P4 Technical Reference Manual > Chapter Chip Boot Control.

3.2

VDDO_FLASH Voltage Control

ESP32-P4 supplies power to flash via VDDO_FLASH, which outputs 3.3 V by default. After burning

EFUSE_0PXA_TIEH_SEL_0, the output changes to 1.8 V.

Table 3-4. VDDO_FLASH Voltage Control

VDDO_FLASH power source 2

EFUSE_0PXA_TIEH_SEL_0

Voltage

Flash LDO

3.3 V

1.8 V

1 Bold marks the default value and configuration.

2 See Section 2.6.2 Power Scheme.

3.3

ROM Messages Printing Control

During the boot process, the messages by the ROM code can be printed to:

• (Default) UART0 and USB Serial/JTAG controller

• USB Serial/JTAG controller

• UART0

EFUSE_UART_PRINT_CONTROL and GPIO36 control ROM messages printing to UART0 as shown in Table 3-5

UART0 ROM Message Printing Control.

Table 3-5. UART0 ROM Message Printing Control

UART0 ROM Code Printing

EFUSE_UART_PRINT_CONTROL

GPIO36

Enabled

Ignored

Disabled

Ignored

1 Bold marks the default value and configuration.

EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT controls the printing to USB Serial/JTAG controller as shown in

Table 3-6 USB Serial/JTAG ROM Message Printing Control.

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ESP32-P4 Series Datasheet v0.5

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