ESP32-P4 datasheet(47/93 Pages) ESPRESSIF

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4 Functional Description

* HP CPU0 will be automatically released from reset after chip power-up.

* HP CPU1 is at reset by default after chip power-up, and needs to be manually released from

reset.

* LP CPU is at reset after chip power-up, and needs to be manually released from reset by

configuring the power management unit (PMU).

– Core Reset: resets the whole digital system except for LP AON. HP core and LP core can be reset

independently: HP Core Reset resets HP CPU0, HP CPI1, HP peripherals, HP GPIO, etc., and LP

Core Reset resets LP CPU and LP peripherals.

– System Reset: resets the whole digital system, including the LP system.

– Chip Reset: resets the whole chip.

• Software reset and hardware reset:

– Software Reset: triggered via software by configuring the corresponding registers of CPU.

– Hardware Reset: triggered directly by the hardware.

4.1.4.3 Clock

ESP32-P4 clocks are mainly sourced from oscillator (OSC, including Resistor-Capacitor circuit), crystal (XTAL),

and PLL circuit, and then processed by the dividers or selectors, which allows most functional modules to

select their working clock according to their power consumption and performance requirements.

ESP32-P4 clocks can be classified into two types depending on their frequencies:

• High speed clocks for devices working at a higher frequency, such as HP CPU0/1 and digital peripherals

– CPLL_CLK: internal 400 MHz PLL clock. Its reference clock is XTAL_CLK

– MPLL_CLK: internal 500 MHz PLL clock. Its reference clock is XTAL_CLK

– SPLL_CLK: internal 480 MHz PLL clock. Its reference clock is XTAL_CLK

• Slow speed clocks for LP system and some peripherals working in low-power mode

– XTAL32K_CLK: external 32 kHz crystal clock

– RC_SLOW_CLK: internal slow RC oscillator with adjustable frequency (150 kHz by default)

– OSC_SLOW_CLK: external slow clock input through XTAL_32K_N, with a frequency of 32 kHz by

default. After configuring this GPIO, also configure the Hold function

– XTAL_CLK: 40 MHz external crystal clock

– RC_FAST_CLK: internal fast RC oscillator with adjustable frequency (20 MHz by default)

– PLL_LP_CLK: internal PLL clock with a frequency of 8 MHz by default. Its reference clock can be

XTAL32K_CLK

4.1.4.4

Interrupt Matrix

The Interrupt Matrix in the ESP32-P4 chip routes interrupt requests generated by various peripherals to CPU

interrupts.

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ESP32-P4 Series Datasheet v0.5

ESP32-P4 Datasheet(PDF) 47 Page - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD.