HD64F36049 datasheet(387/562 Pages) RENESAS

Part #	HD64F36049

Description	Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Tiny Series

PDF	562 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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Section 18 I

2C Bus Interface 2 (IIC2)

Rev. 3.00 Mar. 15, 2006 Page 355 of 526

REJ09B0060-0300

Bit

Bit Name

Initial

Value

R/W

Description

ADZ

R/W

General Call Address Recognition Flag

This bit is valid in I

2C bus format slave receive mode.

[Setting condition]

• When the general call address is detected in slave

receive mode

[Clearing condition]

• When 0 is written in ADZ after reading ADZ=1

18.3.6

Slave Address Register (SAR)

SAR selects the communication format and sets the slave address. When the chip is in slave mode

with the I

2C bus format, if the upper 7 bits of SAR match the upper 7 bits of the first frame

received after a start condition, the chip operates as the slave device.

Bit

Bit Name

Initial

Value

R/W

Description

7 to 1

SVA6 to

SVA0

All 0

R/W

Slave Address 6 to 0

These bits set a unique address in bits SVA6 to SVA0,

differing form the addresses of other slave devices

connected to the I

2C bus.

R/W

Format Select

0: I

2C bus format is selected.

1: Clocked synchronous serial format is selected.

HD64F36049 Datasheet(PDF) 387 Page - Renesas Technology Corp

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