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HD64F36049 Datasheet(PDF) 496 Page - Renesas Technology Corp |
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HD64F36049 Datasheet(HTML) 496 Page - Renesas Technology Corp |
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496 / 562 page ![]() Appendix Rev. 3.00 Mar. 15, 2006 Page 464 of 526 REJ09B0060-0300 Symbol Description ⊕ Logical exclusive OR of the operands on both sides ∼ NOT (logical complement) ( ), < > Contents of operand Condition Code Notation (cont) Symbol Description Changed according to execution result * Undetermined (no guaranteed value) 0 Cleared to 0 1 Set to 1 — Not affected by execution of the instruction ∆ Varies depending on conditions, described in notes Note: General registers include 8-bit registers (R0H to R7H and R0L to R7L) and 16-bit registers (R0 to R7 and E0 to E7). |
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