HD64F36049 datasheet(281/562 Pages) RENESAS

281 / 562 page

Section 14 Timer Z

Rev. 3.00 Mar. 15, 2006 Page 249 of 526

REJ09B0060-0300

Figure 14.21 shows an example of the PWM mode setting procedure.

Table 14.3

Initial Output Level of FTIOB0 Pin

TOB0

POLB

Initial Output Level

[1]

Select the counter clock with bits TPSC2 to

TOSC0 in TCR. When an external clock is

selected, select the external clock edge with

bits CKEG1 and CKEG0 in TCR.

[2]

Use bits CCLR1 and CCLR0 in TCR to select

the counter clearing source.

[3]

Select the PWM mode with bits PWMB0 to

PWMD0 and PWMB1 to PWMD1 in TPMR.

[4]

Set the initial output value with bits TOB0 to

TOD0 and TOB1 to TOD1 in TOCR.

[5]

Set the output level with bits POLB to POLD in

POCR.

[6]

Set the cycle in GRA, and set the duty in the

other GR.

[7]

Enable or disable the timer output by TOER.

[8]

Set the STR bit in TSTR to 1 and start the

counter operation.

[1]

[2]

[3]

[4]

[5]

[6]

[7]

PWM mode

Select counter clock

Select counter clearing source

Set PWM mode

Set initial output level

Select output level

Set GR

Enable waveform output

[8]

Start counter operation

Figure 14.21 Example of PWM Mode Setting Procedure

HD64F36049 Datasheet(PDF) 281 Page - Renesas Technology Corp

HD64F36049 Datasheet(HTML) 281 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL