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HD64F36049 Datasheet(PDF) 328 Page - Renesas Technology Corp |
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HD64F36049 Datasheet(HTML) 328 Page - Renesas Technology Corp |
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328 / 562 page ![]() Section 16 14-Bit PWM Rev. 3.00 Mar. 15, 2006 Page 296 of 526 REJ09B0060-0300 16.3 Register Descriptions The 14-bit PWM has the following registers. • PWM control register (PWCR) • PWM data register U (PWDRU) • PWM data register L (PWDRL) 16.3.1 PWM Control Register (PWCR) PWCR selects the conversion period. Bit Bit Name Initial Value R/W Description 7 6 5 4 3 2 1 1 1 1 1 1 1 1 Reserved These bits are always read as 1, and cannot be modified. 0 PWCR0 0 R/W Clock Select 0: The input clock is φ/2 (tφ = 2/φ) The conversion period is 16384/φ, with a minimum modulation width of 1/ φ 1: The input clock is φ/4 (tφ = 4/φ) The conversion period is 32768/φ, with a minimum modulation width of 2/ φ [Legend] t φ: Period of PWM clock input |
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