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SH7101 Datasheet(PDF) 119 Page - Renesas Technology Corp

Part # SH7101
Description  32-Bit RISC Microcomputer
PDF  486 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7101 Datasheet(HTML) 119 Page - Renesas Technology Corp

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6. Interrupt Controller (INTC)
Rev.2.00 Sep. 27, 2007 Page 85 of 448
REJ09B0394-0200
FD
E
ME
E
MM
E
EE
FD
F
3
1
3
Interrupt acceptance
IRQ
m1 m2 1 m3 1
5 + m1 + m2 + m3
Instruction (instruction
replaced by interrupt
exception processing)
Overrun fetch
Interrupt service routine
start instruction
Legend:
F: Instruction fetch (instruction fetched from memory where program is stored).
D: Instruction decoding (fetched instruction is decoded).
E: Instruction execution (data operation and address calculation is performed according to the results
of decoding).
M: Memory access (data in memory is accessed).
Figure 6.5 Example of the Pipeline Operation when an IRQ Interrupt is Accepted



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