HD6433644R datasheet(241/549 Pages) RENESAS

241 / 549 page

Section 9 Timers

Rev. 6.00 Sep 12, 2006 page 221 of 526

REJ09B0326-0600

Timer Control/Status Register V (TCSRV)

Bit

CMFB

CMFA

OVF



OS3

OS2

OS1

OS0

Initial value

Read/Write

R/(W)*



R/W

Note:

* Bits 7 to 5 can be only written with 0, for flag clearing.

TCSRV is an 8-bit register that sets compare match flags and the timer overflow flag, and controls

compare match output.

TCSRV is initialized to H'10 upon reset and in standby mode, watch mode, subsleep mode, and

subactive mode.

Bit 7



Compare Match Flag B (CMFB): Bit 7 is a status flag indicating that TCNTV has

matched TCORB. This flag is set by hardware and cleared by software. It cannot be set by

software.

Bit 7: CMFB

Description

Clearing condition:

After reading CMFB = 1, cleared by writing 0 to CMFB

(initial value)

Setting condition:

Set when the TCNTV value matches the TCORB value

Bit 6



Compare Match Flag A (CMFA): Bit 6 is a status flag indicating that TCNTV has

matched TCORA. This flag is set by hardware and cleared by software. It cannot be set by

software.

Bit 6: CMFA

Description

Clearing condition:

After reading CMFA = 1, cleared by writing 0 to CMFA

(initial value)

Setting condition:

Set when the TCNTV value matches the TCORA value

HD6433644R Datasheet(PDF) 241 Page - Renesas Technology Corp

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