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HD6433644R Datasheet(PDF) 242 Page - Renesas Technology Corp |
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HD6433644R Datasheet(HTML) 242 Page - Renesas Technology Corp |
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242 / 549 page ![]() Section 9 Timers Rev. 6.00 Sep 12, 2006 page 222 of 526 REJ09B0326-0600 Bit 5 Timer Overflow Flag (OVF): Bit 5 is a status flag indicating that TCNTV has overflowed from H'FF to H'00. This flag is set by hardware and cleared by software. It cannot be set by software. Bit 5: OVF Description 0 Clearing condition: After reading OVF = 1, cleared by writing 0 to OVF (initial value) 1 Setting condition: Set when TCNTV overflows from H'FF to H'00 Bit 4 Reserved Bit: Bit 4 is reserved; it is always read as 1, and cannot be modified. Bits 3 to 0 Output Select 3 to 0 (OS3 to OS0): Bits 3 to 0 select the way in which the output level at the TMOV pin changes in response to compare match between TCNTV and TCORA or TCORB. OS3 and OS2 select the output level for compare match B. OS1 and OS0 select the output level for compare match A. The two levels can be controlled independently. If two compare matches occur simultaneously, any conflict between the settings is resolved according to the following priority order: toggle output > 1 output > 0 output. When OS3 to OS0 are all cleared to 0, timer output is disabled. After a reset, the timer output is 0 until the first compare match. Bit 3: OS3 Bit 2: OS2 Description 0 0 No change at compare match B (initial value) 1 0 output at compare match B 1 0 1 output at compare match B 1 Output toggles at compare match B Bit 1: OS1 Bit 0: OS0 Description 0 0 No change at compare match A (initial value) 1 0 output at compare match A 1 0 1 output at compare match A 1 Output toggles at compare match A |
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