3886 datasheet(176/380 Pages) RENESAS

176 / 380 page

3886 Group User’s Manual

APPLICATION

2-59

2.4 Serial I/O

Figure 2.4.26 shows registers setting relevant to Serial I/O1, and Figure 2.4.27 shows a setting of

serial I/O1 transmission data.

Fig. 2.4.27 Setting of serial I/O1 transmission data

Fig. 2.4.26 Registers setting relevant to Serial I/O1

SRDY1

output enable bit : SRDY1 output disabled

Serial I/O1 synchronous clock selection bit : BRG/4

Serial I/O1 transmit interrupt enable bit : Interrupt disabled

ICON1

Interrupt control register 1 (Address : 3E16)

Serial I/O1 transmit interrupt request bit

Confirm completion of transmitting

1-byte data by one unit.

“1” : Transmit shift completion

IREQ1

Interrupt request register 1 (Address : 3C16)

SIO1CON

Serial I/O1 control register (Address : 1A16)

BRG count source selection bit : f(XIN)

Transmit interrupt source selection bit : Transmit shift operating

completion

Transmit enable bit : Transmit enabled

Receive enable bit : Receive disabled

b7b0

Serial I/O1 mode selection bit : Clock synchronous serial I/O

Serial I/O1 enable bit : Serial I/O1 enabled

P45/TXD P-channel output disable bit : CMOS output

UARTCON

UART control register (Address : 1B16)

Set “division ratio – 1”.

BRG

Baud rate generator (Address : 1C16)

b7b0

Set a transmission data.

Confirm that transmission of the previous data is

completed (bit 3 of the Interrupt request register 1

is “1”) before writing data.

TB/RB

Transmit/Receive buffer register (Address : 1816)

b7b0

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