3886 datasheet(187/380 Pages) RENESAS

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2-70

3886 Group User’s Manual

APPLICATION

2.4 Serial I/O

Fig. 2.4.40 Registers setting relevant to receiving side

Receiving side

Serial I/O1 status register (Address : 1916)

SIO1STS

BRG

Serial I/O1 control register (Address : 1A16)

SIO1CON

UARTCON

UART control register (Address : 1B16)

Character length selection bit : 8 bits

Parity enable bit : Parity checking disabled

Stop bit length selection bit : 2 stop bits

Baud rate generator (Address : 1C16)

f(XIN)

Transfer bit rate ✕ 16 ✕ m

–1

Set

When bit 0 of the Serial I/O1 control register (Address : 1A16) is set to “0,”

a value of m is 1.

When bit 0 of the Serial I/O1 control register (Address : 1A16) is set to “1,”

a value of m is 4.

✽

BRG count source selection bit : f(XIN)/4

Serial I/O1 synchronous clock selection bit : BRG/16

Transmit enable bit : Transmit disabled

Receive enable bit : Receive enabled

Serial I/O1 mode selection bit : Asynchronous serial I/O(UART)

Serial I/O1 enable bit : Serial I/O1 enabled

SRDY1

output enable bit : SRDY1 out disabled

Receive buffer full flag

Confirm completion of receiving 1-byte data with this flag.

“1” : At completing reception

“0” : At reading out contents of Receive buffer register

Overrun error flag

“1” : When data is ready in Receive shift register while Receive buffer

Parity error flag

“1” : When a parity error occurs in enabled parity.

Framing error flag

“1” : When stop bits cannot be detected at the specified timing.

Summing error flag

“1” : When any one of the following errors occurs.

• Overrun error

• Parity error

• Framing error

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