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3886 Datasheet(PDF) 229 Page - Renesas Technology Corp |
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3886 Datasheet(HTML) 229 Page - Renesas Technology Corp |
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229 / 380 page  3886 Group User’s Manual APPLICATION 2-112 2.6 PWM Fig. 2.6.9 Relevant registers setting Outline: • Control of VS tuner by using the 14-bit resolution PWM0 output function • f(XIN) = 8 MHz PWM control register 1 (address 2E16) PCTL1 1 Enable PWM0 output Note: The PWM0 output function has priority even when the bit corresponding to P56 pin of port P5 direction register is set to the input mode. PWM0H register (address 3016) Set high-order 8 bits (N) of 14-bit data to be output PWM0H Note: Depending on data (N) of the high-order 8 bits, the period (250 ✕ N) of “H” level during the sub-period (64 µs) is determined. PWM0L register (address 3116) Set low-order 6 bits (m) of 14-bit data to be output PWM0L Note: Depending on data (m) of the low-order 6 bits, the number of sub-period to which the ADD bit is to be added within the repetitive cycle consisting of 64 sub-periods is determined. When output data is written to the PWM0L register, bit 7 of this register becomes “1”. When completing to transfer data from the PWM0L register to the PWM0 latch, bit 7 becomes “0”. AD/DA control register (address 3416) ADCON 0 Select P56/PWM01 output pin |
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