7480 datasheet(176/337 Pages) RENESAS

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7480 Group and 7481 Group User's Manual

1-159

HARDWARE

1.18.2 Register Associated with Oscillation Circuit

Figure 1.18.2 shows the memory map of the register associated with the oscillation circuit.

00FB16

CPU mode register (CPUM)

Figure 1.18.2 Memory Map of Register Associated with Oscillation Circuit

The CPU mode register consists of the bits that select a stack page and an internal clock, as well as the

bit that selects a count source of the watchdog timer.

Figure 1.18.3 shows the CPU mode register.

Figure 1.18.3 CPU Mode Register

1.18 Oscillation Circuit

CPU mode register

b4 b3 b2 b1 b0

Name

Function

At reset

Undefined

CPU mode register (CPUM) [Address 00FB16]

Fix these bits to ‘0’.

Stack page selection bit

(Note)

0 : Zero page

1 : 1 page

Watchdog timer L count

source selection bit

0 : f(XIN)/8

1 : f(XIN)/16

Clock division

ratio selection bit

0 : f(XIN)/2 (high-speed mode)

1 : f(XIN)/8 (medium-speed mode)

Not implemented. Writing to this bit is disabled.

This bit is undefined at reading.

Not implemented. Writing to this bit is disabled.

This bit is undefined at reading.

Note: In the products whose RAM size is 192 bytes or less, set this bit to ‘0’.

Not implemented. Writing to this bit is disabled.

This bit is undefined at reading.

Undefined

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