7480 datasheet(224/337 Pages) RENESAS

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7480 Group and 7481 Group User's Manual

2-9

APPLICATIONS

Figure 2.2.8 Control Procedure Example of Buzzer Output

2.2 Timer X and Timer Y

Initialize

Set timer X mode register

TXM(Address 00F616)

Pulse output mode

Writing to latch and timer simultaneously

RESET(Note 1)

SEI

Timer X

← 007C16(Note 3)

CLI

Set timer XY control register

Processing

01 ×× 01

TXYCON(Address 00F816)

Timer X count start

Port P40 (alternative function of CNTR0) is set to output.

CNTR0 edge selection bit

← 0 (Note 2)

Buzzer output requested ?

TXYCON(Address 00F816)

Buzzer output processing

Timer X count source : f(XIN)/8

Timer X count stopped ?

Timer X count operating ?

Timer X

← 007C16 (Note3)

Port P40 (alternative function of CNTR0)

← HIGH

Notes 1: State after system is released from reset

• Timer X stop control bit = 1 (count stop)

2: In pulse output mode, the output level of CNTR0 pin is initialized to

HIGH by writing to timer X (writing to latch and timer simultaneously).

3: • 007C16 = 125–1

• Write to timer X in order of low-order to high-order byte.

• The output level of CNTR0 pin is initialized by writing to timer X

(writing to latch and timer simultaneously).

Processing

Set timer XY control register

Timer X count stop

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