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7480 Datasheet(PDF) 220 Page - Renesas Technology Corp |
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7480 Datasheet(HTML) 220 Page - Renesas Technology Corp |
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220 / 337 page  7480 Group and 7481 Group User's Manual 2-5 APPLICATIONS Figure 2.2.2 Control Procedure Example of 100-ms Processing 2.2 Timer X and Timer Y Set timer X mode register TXM(Address 00F616) Timer • event count mode Writing to latch and timer simultaneously RESET (Note 1) SEI Timer X interrupt enable bit ← 1 Timer X ← C34F16 (Note 2) Timer X interrupt request bit ← 0 CLI Set Timer XY control register Processing Timer X interrupt service routine 100-ms periodic processing RTI Timer X interrupt generated every 100 ms TXYCON(Address 00F816) Timer X count started 0 Initialize Timer X count source: f(XIN)/16 10 × 0000 × b7 b0 b7 b0 Notes 1: State after system is released from reset • Timer X stop control bit = 1 (count stopped) 2: • C34F16 = 50000 – 1 • Write in order of low-order to high-order byte. |
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