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7480 Datasheet(PDF) 272 Page - Renesas Technology Corp |
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7480 Datasheet(HTML) 272 Page - Renesas Technology Corp |
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272 / 337 page ![]() 3-7 3.1 Control Registers APPENDICES 7480 Group and 7481 Group User's Manual Figure 3.1.9 STP Instruction Operation Control Register STP instruction operation control register b5 b6 b7 b4 b3 b2 b1 b0 b Function At reset 1 2 3 4 5 6 7 0 1 STP instruction operation control register (STPCON) [Address 00DE16] 0 0 0 0 0 0 0 STP and WIT valid/invalid selection bit (Note) Name 0 : STP/WIT instruction valid 1 : STP/WIT instruction invalid Not implemented. Writing to these bits is disabled. These bits are ‘0’ at reading. Note: The STP and WIT instructions are invalid after the system is released from reset. When using these instructions, set STP and WIT valid/invalid selection bit of the STP instruction operation control register to ‘1’, then set this bit to ‘0’. (Writing twice successively) When not using the STP and WIT instructions, set this bit to ‘1’ either once or twice. 00 000 00 O 0 0 0 0 0 0 0 RW O × × × × × × × |
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