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ACS8530 Datasheet(PDF) 47 Page - Semtech Corporation |
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ACS8530 Datasheet(HTML) 47 Page - Semtech Corporation |
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47 / 152 page  ADVANCED COMMUNICATIONS FINAL DATASHEET Revision 3.02/November 2005 © Semtech Corp. Page 47 www.semtech.com ACS8530 SETS Figure 16 Write Access Timing in INTEL Mode Table 23 Write Access Timing in INTEL Mode (for use with Figure 16) Symbol Parameter MIN TYP MAX tsu1 Setup A valid to CSBfalling edge 4 ns - - tsu2 Setup CSBfalling edge to WRBfalling edge 0 ns - - tsu3 Setup AD valid before WRBrising edge 6 ns - - td2 Delay CSBfalling edge to RDY active - - 13 ns td3 Delay WRBfalling edge to RDYfalling edge - - 14 ns td5 Delay CSBrising edge to RDY high-Z - - 10 ns tpw1 WRB Low time 25 ns 185 ns - tpw2 RDY Low time 10 ns - 173 ns th1 Hold A valid after WRBrising edge 12 ns - - th2 Hold CSB Low after WRBrising edge 0 ns - - th3 Hold WRB Low after RDYrising edge 0 ns - - th4 Hold AD valid after WRBrising edge 4 ns - - tp Time between consecutive accesses (WRBrising edge to WRBfalling edge, or WRBrising edge to RDBfalling edge) 160 ns - - F8110D_010WriteAccIntel_01 CSB address Z Z data WRB RDB tpw1 th2 th1 tsu2 A tsu1 td3 tpw2 th3 AD tsu3 th4 RDY td2 td5 |
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