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ACS8530 Datasheet(PDF) 79 Page - Semtech Corporation |
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ACS8530 Datasheet(HTML) 79 Page - Semtech Corporation |
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79 / 152 page  ADVANCED COMMUNICATIONS FINAL DATASHEET Revision 3.02/November 2005 © Semtech Corp. Page 79 www.semtech.com ACS8530 SETS Address (hex): 30 Register Name cnfg_sts_remote_sources_valid Description (R/W) Bits [7:0] of the remote sources valid register. A register used to disable sources that are invalid in another device in a redundancy pair. Default Value 1111 1111 Bit 7Bit 6 Bit 5Bit 4 Bit 3 Bit 2Bit 1Bit 0 I8 I7 I6 I5 I4 I3 I2 I1 Bit No. Description Bit Value Value Description 7 I8 Bit enabling input I8 to be considered for locking to. If this bit is not set, then even if this input I8 is valid, it will still not appear in Reg. 0A and 0B (sts_priority_table). 0 1 Locking to input I8 disallowed. Locking to input I8 allowed. 6 I7 Bit enabling input I7 to be considered for locking to. If this bit is not set, then even if this input I7 is valid, it will still not appear in Reg. 0A and 0B (sts_priority_table). 0 1 Locking to input I7 disallowed. Locking to input I7 allowed. 5 I6 Bit enabling input I6 to be considered for locking to. If this bit is not set, then even if this input I6 is valid, it will still not appear in Reg. 0A and 0B (sts_priority_table). 0 1 Locking to input I6 disallowed. Locking to input I6 allowed. 4 I5 Bit enabling input I5 to be considered for locking to. If this bit is not set, then even if this input I5 is valid, it will still not appear in Reg. 0A and 0B (sts_priority_table). 0 1 Locking to input I5 disallowed. Locking to input I5 allowed. 3 I4 Bit enabling input I4 to be considered for locking to. If this bit is not set, then even if this input I4 is valid, it will still not appear in Reg. 0A and 0B (sts_priority_table). 0 1 Locking to input I4 disallowed. Locking to input I4 allowed. 2 I3 Bit enabling input I3 to be considered for locking to. If this bit is not set, then even if this input I3 is valid, it will still not appear in Reg. 0A and 0B (sts_priority_table). 0 1 Locking to input I3 disallowed. Locking to input I3 allowed. 1 I2 Bit enabling input I2 to be considered for locking to. If this bit is not set, then even if this input I2 is valid, it will still not appear in Reg. 0A and 0B (sts_priority_table). 0 1 Locking to input I2 disallowed. Locking to input I2 allowed. |
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