ACS8530 datasheet(22/152 Pages) SEMTECH

22 / 152 page

ADVANCED COMMUNICATIONS

FINAL

DATASHEET

Revision 3.02/November 2005 © Semtech Corp.

Page 22

www.semtech.com

ACS8530 SETS

the coarse phase detector range, since these functions go

hand in hand. This detector may be used in the case

where it is required that a phase loss indication is not

given for reasonable amounts of input jitter and so the

fine phase loss detector is disabled and the coarse

detector is used instead.

Damping Factor Programmability

The DPLL damping factor is set by default to provide a

maximum wander gain peak of around 0.1 dB. Many of

the specifications (e.g. GR-1244-CORE[19], G.812[10] and

G.813[11]) specify a wander transfer gain of less than

0.2 dB. GR-253[17] specifies jitter (not wander) transfer of

less than 0.1 dB. To accommodate the required levels of

transfer gain, the ACS8530 provides a choice of damping

factors, with more choice given as the bandwidth setting

increases into the frequency regions classified as jitter.

Table 5 shows which damping factors are available for

selection at the different bandwidth settings, and what

the corresponding jitter transfer approximate gain peak

will be.

Local Oscillator Clock

The Master system clock on the ACS8530 should be

provided by an external clock oscillator of frequency

12.800 MHz. The clock specification is important for

meeting the AT&T, ITU/ETSI and Telcordia performance

requirements for Holdover mode. Telcordia specifications

require a non-temperature-related drift of less than 1 ppb

per day and a drift of 10 ppb over the temperature range

0 to +50°C.

Telcordia GR-1244 Specification

Notes: (i) Figure quoted is for long-term drift over the range

0°C to +40

°C, but for short-term (<96 hours) the range is

-5°C to +50°C.

Max rate of drift = ±30°C/hr.

(ii) Determined by external XO

Please contact Semtech for information on crystal

oscillator suppliers.

Crystal Frequency Calibration

The absolute crystal frequency accuracy is less important

than the stability since any frequency offset can be

compensated by adjustment of register values in the IC.

This allows for calibration and compensation of any

crystal frequency variation away from its nominal value.

± 50 ppm adjustment would be sufficient to cope with

most crystals, in fact the range is an order of magnitude

larger due to the use of two 8-bit register locations. The

setting of the cnfg_nominal_frequency register allows for

this adjustment. An increase in the register value

increases the output frequencies by 0.0196229 ppm for

each LSB step.

Note...The default register value (in decimal) = 39321

(9999 hex) = 0 ppm offset. The minimum to maximum offset

range of the register is 0 to 65535 dec, giving an adjustment

range of -771 ppm to +514 ppm of the output frequencies, in

0.0196229 ppm steps. Example: If the crystal was oscillating

at 12.8 MHz + 5 ppm, then the calibration value in the register

to give a - 5 ppm adjustment in output frequencies to

compensate for the crystal inaccuracy, would be:

39321 - (5 / 0.0196229) = 39066 (dec) = 989A (hex).

Table 5 Available Damping Factors for different DPLL

Bandwidths, and associated Jitter Peak Values

Bandwidth

Reg. 6B [2:0]

Damping

Factor selected

Gain Peak/ dB

0.5 mHz to 4 Hz 1, 2, 3, 4, 5

0.1

8 Hz

2.5

0.2

2, 3, 4, 5

0.1

18 Hz

1.2

0.4

22.5

0.2

3, 4, 5

0.1

35 Hz

1.2

0.4

22.5

0.2

350.1

4, 5

0.06

70 Hz

1.2

0.4

22.5

0.2

350.1

410

0.06

520

0.03

Table 6 Stratum 3E Specification

Parameter

Value

Initial Offset

±1 x 10-9

Offset Over Temperature (Note i)

±10 x 10-9 (Note ii)

Drift Rate Due to Ageing

±1.16 x 10-14/second (Note ii)

(= 1 x 10-9/day)

ACS8530 Datasheet(PDF) 22 Page - Semtech Corporation

ACS8530 Datasheet(HTML) 22 Page - Semtech Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL