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AM3892 Datasheet(PDF) 154 Page - Texas Instruments |
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AM3892 Datasheet(HTML) 154 Page - Texas Instruments |
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154 / 299 page ![]() AM3894 AM3892 SPRS681A – OCTOBER 2010 – REVISED MARCH 2011 www.ti.com 8.3.1.2.2 Compatible JEDEC DDR2 Devices Table 8-2 shows the parameters of the JEDEC DDR2 devices that are compatible with this interface. Generally, the DDR2 interface is compatible with x16 DDR2-800 speed grade DDR2 devices. Table 8-2. Compatible JEDEC DDR2 Devices NO. PARAMETER MIN MAX UNIT 1 JEDEC DDR2 device speed grade(1) DDR2-800 2 JEDEC DDR2 device bit width x16 x16 Bits 3 JEDEC DDR2 device count(2) 1 2 Devices 4 JEDEC DDR2 device ball count(3) 84 92 Balls (1) Higher DDR2 speed grades are supported due to inherent JEDEC DDR2 backwards compatibility. (2) One DDR2 device is used for a 16-bit DDR2 memory system. Two DDR2 devices are used for a 32-bit DDR2 memory system. (3) The 92-ball devices are retained for legacy support. New designs will migrate to 84-ball DDR2 devices. Electrically, the 92- and 84-ball DDR2 devices are the same. 8.3.1.2.3 PCB Stackup The minimum stackup required for routing the AM389x device is a six-layer stackup as shown in Table 8-3. Additional layers may be added to the PCB stackup to accommodate other circuitry or to reduce the size of the PCB footprint. Table 8-3. Minimum PCB Stackup LAYER TYPE DESCRIPTION 1 Signal Top routing mostly horizontal 2 Plane Ground 3 Plane Power 4 Signal Internal routing 5 Plane Ground 6 Signal Bottom routing mostly vertical 154 Peripheral Information and Timings Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): AM3894 AM3892 |
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