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AM3892 Datasheet(PDF) 155 Page - Texas Instruments |
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AM3892 Datasheet(HTML) 155 Page - Texas Instruments |
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155 / 299 page ![]() AM3894 AM3892 www.ti.com SPRS681A – OCTOBER 2010 – REVISED MARCH 2011 Complete stackup specifications are provided in Table 8-4. Table 8-4. PCB Stackup Specifications NO. PARAMETER MIN TYP MAX UNIT 1 PCB routing/plane layers 6 2 Signal routing layers 3 3 Full ground layers under DDR2 routing region 2 4 Number of ground plane cuts allowed within DDR routing region 0 5 Number of ground reference planes required for each DDR2 routing layer 1 6 Number of layers between DDR2 routing layer and reference ground plane 0 7 PCB routing feature size 4 Mils 8 PCB trace width, w 4 Mils 9 PCB BGA escape via pad size(1) 18 20 Mils 10 PCB BGA escape via hole size(1) 10 Mils 11 MPU BGA pad size 12 DDR2 device BGA pad size(2) 13 Single-ended impedance, Zo 50 75 Ω 14 Impedance control(3) Z-5 Z Z+5 Ω (1) A 20/10 via may be used if enough power routing resources are available. An 18/10 via allows for more flexible power routing to the MPU. (2) For the DDR2 device BGA pad size, see the DDR2 device manufacturer documentation. (3) Z is the nominal singled-ended impedance selected for the PCB specified by item 13. Copyright © 2010–2011, Texas Instruments Incorporated Peripheral Information and Timings 155 Submit Documentation Feedback Product Folder Link(s): AM3894 AM3892 |
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