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AFE4110 Datasheet(PDF) 39 Page - Texas Instruments |
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AFE4110 Datasheet(HTML) 39 Page - Texas Instruments |
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39 / 68 page ![]() NSELx + - CxIFGlogic CxOUT Reference 256mV REFON CMPON MDBandbufferregister CONVON APVDIVRegister Vcc 4 8 0000 ADC-DAC-SAR-REG Up-DnCounter Run/ Stop 00 2 set clr TA0EN TA0.0 CBSTP 0 1 OSWP 0 1 Aout OSEL CLKSEL A0 A1 A3 A2 VREF SMCLK SLOPE ODEN D/A-8 DBON TBSTP TA0.1 TA1EN TA1.0 De- Glitching DFSETx SBSTP VREFEN SLOPE EOCIFGlogic sEOC 0001 0010 0011 0100 0101 0110 0111 1000 PSELx 4 0000 0001 0010 0011 0100 0101 0110 0111 Pre-Scaler by 1/2/4/8/16/32 CLKDIVx SAREN xCLK xCLK from AZ-logic StartStopLogic Clock Logic MCLK VLOCLK 01 10 11 1001 J SVMIFGlogic R R 6R Vcc AFE4110 www.ti.com SLLSE48 – JANUARY 2012 A-Pool The analog functions pool (A-Pool) provides a series of function that can be configured to a Digital to Analog converter (DAC), multi channel Analog to Digital converter (ADC), Supply voltage supervisor SVS and Comparator, input voltage dividers and an internal reference source allow wide range of combined analog functions. For a complete description of A-Pool, see the Analog Pool chapter of the MSP430x09x Family Users Guide (SLAU321) Figure 9. Block Diagram of A-Pool Table 10. A-Pool Analog inputs Connection Table A-POOL ANALOG INPUT PAD PSEL NSEL A3PSEL A0_port_sel A3a P1.2 0011 0011 0 X A3b P1.3 0011 0011 1 X A2 P1.0 0010 0010 X X A1 P1.1 0001 0001 X X A0a P1.4 0000 0000 X 0 A0b P3.3 0000 0000 X 1 Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 39 Product Folder Link(s) :AFE4110 |
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