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AFE4110 Datasheet(PDF) 49 Page - Texas Instruments |
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AFE4110 Datasheet(HTML) 49 Page - Texas Instruments |
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49 / 68 page ![]() AFE4110 www.ti.com SLLSE48 – JANUARY 2012 ANALOG_PORTCTL2: Analog Analog port control 2 15 14 13 12 11 10 9 8 – – – – – – – – r-0 r-0 r-0 r-0 r-0 r-0 r-0 r-0 7 6 5 4 3 2 1 0 dp1_6 dp1_5 dp3_5 dp3_4 dp3_3 dp3_2 dp3_1 dp3_0 rw-0 rw-0 rw-0 rw-0 rw-0 rw-0 rw-0 rw-0 disable_p3_0 Bit 0 "1" disables input driver. Use to enable connection analog voltage input w/o feed through current at PORTx.y input driver stage(1) disable_p3_1 Bit 1 "1" disables input driver. Use to enable connection analog voltage input w/o feed through current at PORTx.y input driver stage(1) disable_p3_2 Bit 2 "1" disables input driver. Use to enable connection analog voltage input w/o feed through current at PORTx.y input driver stage (1) disable_p3_3 Bit 3 "1" disables input driver. Use to enable connection analog voltage input w/o feed through current at PORTx.y input driver stage (1) disable_p3_4 Bit 4 "1" disables input driver. Use to enable connection analog voltage input w/o feed through current at PORTx.y input driver stage (1) disable_p3_5 Bit 5 "1" disables input driver. Use to enable connection analog voltage input w/o feed through current at PORTx.y input driver stage(1) disable_p1_5 Bit 6 "1" disables input driver. Use to enable connection analog voltage input w/o feed through current at PORTx.y input driver stage (1) disable_p1_6 Bit 7 "1" disables input driver. Use to enable connection analog voltage input w/o feed through current at PORTx.y input driver stage (1) (1) force '0' when test_atpg_en_i = '1' ANALOG_TIMERCTL: Analog timer CCx input mux control 15 14 13 12 11 10 9 8 – – sel_timer1_cci2 – – sel_timer1_cci1 r-0 r-0 rw-0 rw-0 r-0 r-0 rw-0 rw-0 7 6 5 4 3 2 1 0 – – sel_timer0_cci2 – – sel_timer0_cci1 r-0 r-0 rw-0 rw-0 r-0 r-0 rw-0 rw-0 sel_port3_6, sel_port3_7: PORT3.6 and PORT3.7 Input multiplexer control sel_timer0_cci1 Bits 1,0 0,0 0,1 1,0 1,1 Timer0 CCI1A CxOUT from Port P1.1 Port P1.2 Port P1.3 Input Select APOOL Timer0 CCI1B Port P1.0 Port P1.4 Port P1.5 ACTIVATION_OSC_1KHZ Input Select sel_timer0_cci2 Bits 5,4 0,0 0,1 1,0 1,1 Timer0 CCI2A CxOUT from Port P1.1DIR Port P1.2DIR Port P1.3DIR Input Select APOOL Timer0 CCI2B Port P1.0DIR Port P1.4DIR Port P1.5DIR SMCLK Input Select sel_timer1_cci1 Bits 9,8 0,0 0,1 1,0 1,1 Timer1 CCI1A CxOUT from Port P3.0 Port P3.1 Port P3.6 Input Select APOOL Timer1 CCI1B Port P1.6 ACTIVATION_OSC_1KHZ ACLK SMCLK Input Select sel_timer1_cci2 Bits 13,12 0,0 0,1 1,0 1,1 Timer1 CCI2A CxOUT from Port P3.7 Port P3.4 Port P3.5 Input Select APOOL Timer1 CCI2B Port P1.6DIR ACTIVATION_OSC_1KHZ ACLK SMCLK Input Select Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 49 Product Folder Link(s) :AFE4110 |
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