UPD17015GS datasheet(37/120 Pages) NEC

37 / 120 page

µPD17015

Fig. 9-1

Configuration and Functions of the LCD Enable Registers

Flag symbol

LCD enable

6AH

R/W

Power-on

Clock stop

Hold

Address

Read/write

Sets pin P0A

0 to input or output mode.

Sets pin P0A

0 to input mode.

Sets pin P0A

0 to output mode.

Sets pin P0A

1 to input or output mode.

Sets pin P0A

1 to input mode.

Sets pin P0A

1 to output mode.

9.2.4

Using an I/O Port as an Input Port

Select the pin to be set to input mode, using the P0ABIO0 and P0ABIO1 flags of the LCD enable register.

The P0A0 and P0A1 pins can be set to input mode bit by bit.

The specified input pin enters the floating (Hi-Z) status and waits for the input of an external signal.

To read the input data, execute an instruction to read the contents of the port register P0A (such as SKT).

If the signal input to the pin is high, 1 is read from the corresponding port register. If the input signal is low, 0 is

read from the port register.

If a write instruction (such as MOV) is executed for the port register corresponding to an input port, the contents

of the output latch are rewritten.

9.2.5

Using an I/O Port as an Output Port

Select the pin to be set to output mode, using the P0ABIO0 and P0ABIO1 flags of the LCD enable register.

The P0A0 and P0A1 pins can be set in the output mode bit by bit.

The specified output pin outputs the contents of the output latch.

To set the output data, execute a write instruction (such as MOV) for the port register P0A.

To output a high signal to a pin, write 1. To output a low signal, write 0.

To set a port to the floating state, set the port to input mode.

If a read instruction (such as SKT) is executed for the port register corresponding to an output port, the contents

of the output latch are read.

UPD17015GS Datasheet(PDF) 37 Page - NEC

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