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UPD17015GS Datasheet(PDF) 48 Page - NEC

Part # UPD17015GS
Description  4-BIT SINGLE-CHIP MICROCONTROLLER FOR PORTABLE RADIOS
PDF  120 Pages
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

UPD17015GS Datasheet(HTML) 48 Page - NEC

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48
µPD17015
Fig. 10-6 Timing Chart
A
C
B
B
B
B
B
B
B
B
BB
A
B
BB
3.0 V
0 V
VDD
H
CE
L
H
L
H
L
1
0
8 Hz
internal pulse
BTM0CY flag
set pulse
BTM0CY flag
Program
processing
Program
instruction
Supply voltage
applied
Start at address 0
on a power-on reset
Timer
incre-
mented
Timer
incre-
mented
Timer
incremented
Timer
incremented
Timer
incremented
BTM0CY flag detected
Start at
address 0
on a CE
reset
Timer updated because
the BTM0CY flag has
been detected to be
set (1)
Point A
Point B
Point C
Point D
Point E
1
3
3
3
3
3
3
3
3
3
3
3
3
1
As shown in Fig. 10-6, when supply voltage VDD is applied, the 8 Hz internal pulse rises to make the program
start at address 0000H.
When the BTM0CY flag is detected at point A, the BTM0CY flag appears to be cleared (0) because it is just after
power is supplied. Consequently, it is determined that a power failure (power-on reset) has occurred. Then,
process C is performed.
So, process C is performed to select 100 ms as the BTM0CY flag set pulse.
Because the BTM0CY flag is once read-accessed at point A, the BTM0CY flag will be set (1) at intervals of 125
ms.
Even when the CE pin goes to a low at point B and goes to a high at point C, the program continues to update
the clock while performing process B, unless the clock stop instruction is executed.
Because the CE pin goes from a low to a high at point C, a CE reset occurs at point D, where the BTM0CY flag
set pulse rises, to start the program at address 0000H.
When the BTM0CY flag is detected at point E, it is determined that a backup (CE reset) has occurred, because
the flag appears to be set (1).
Also, as easily seen from the figure, if the clock is not updated by 125 ms at point E, the clock loses 125 ms every
time a CE reset occurs.
If process A takes more than 125 ms to detect for a power failure at point E, it is impossible to detect the BTM0CY
flag for two cycles.
Therefore, process A must be performed within 125 ms.
It is necessary, therefore, to detect the BTM0CY flag for power failure detection after the program starts at address
0000H and before the BTM0CY flag is set.



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