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AM3874 Datasheet(PDF) 280 Page - Texas Instruments |
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AM3874 Datasheet(HTML) 280 Page - Texas Instruments |
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280 / 361 page  DDR[x]_D[0] DDR[x]_D[7] DDR[x]_DQM[0] DDR[x]_DQS[0] DDR[x]_DQS[0] DDR[x]_D[8] DDR[x]_D[15] DDR[x]_DQM[1] DDR[x]_DQS[1] DDR[x]_DQS[1] DQ0 DQ7 LDM LDQS LDQS DQ8 DQ15 UDM UDQS UDQS BA0 BA2 A0 A14 CS CAS RAS WE CKE CK CK VREF DDR[x]_D[16] DDR[x]_D[23] DDR[x]_DQM[2] DDR[x]_DQS[2] DDR[x]_DQS[2] DDR[x]_D[24] DDR[x]_D[31] DDR[x]_DQM[3] DDR[x]_DQS[3] DDR[x]_DQS[3] DDR[x]_BA[0] DDR[x]_BA[2] DDR[x]_A[0] DDR[x]_A[14] DDR[x]_CS[0] DDR[x]_CAS DDR[x]_RAS DDR[x]_WE DDR[x]_CKE DDR[x]_CLK DDR[x]_CLK VREFSSTL_DDR[x] 1 K 1% Vio 1.8 (A) DDR2 VREF 0.1 µF VREF 0.1 µF 1 K 1% 0.1 µF (B) 0.1 µF (B) DDR[x]_ODT[1] NC ODT NC NC NC 1 K NC NC 1 K 1 K 1 K DDR[x]_VTP 50 ( 2%) ± Vio 1.8 (A) Vio 1.8 (A) T0 T0 T0 T0 T0 T0 T0 T0 T0 T0 T0 T0 T0 Termination is required. See terminator comments. DDR[x]_ODT[0] DDR[x]_CS[1] NC DDR[x]_RST NC NC AM3874, AM3871 SPRS695C – SEPTEMBER 2011 – REVISED DECEMBER 2013 www.ti.com A. Vio1.8 is the power supply for the DDR2 memories and the AM387x DDR2 interface. B. One of these capacitors can be eliminated if the divider and its capacitors are placed near a VREF pin. Figure 8-48. 16-Bit DDR2 High-Level Schematic 280 Peripheral Information and Timings Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AM3874 AM3871 |
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