SC1200 datasheet(56/60 Pages) TI

56 / 60 page

MSC1200

SBAS289E

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The clock used for this timer is the 1ms clock which results from dividing the system clock by the values in registers MSECH:MSECL.

Reading this register will clear MSINT.

WRT

Write Control. Determines whether to write the value immediately or wait until the current count is finished. Read = 0.

bit 7

0 = Delay Write Operation. The MSINT value is loaded when the current count expires.

1 = Write Immediately. The MSINT counter is loaded once the CPU completes the write operation.

MSINT6-0

Seconds Count. Normal operation would use 1ms as the clock interval.

bits 6-0

MS Interrupt Interval = (1 + MSINT) • (MSEC + 1) • tCLK

Reset Value

SFR FAH

WRT

MSINT6

MSINT5

MSINT4

MSINT3

MSINT2

MSINT1

MSINT0

7FH

Milliseconds Interrupt (MSINT)

Reset Value

SFR F8H

PWDI

PX5

PX4

PX3

PX2

E0H

Reset Value

SFR F9H

WRT

SECINT6

SECINT5

SECINT4

SECINT3

SECINT2

SECINT1

SECINT0

7FH

This system clock is divided by the value of the 16-bit register MSECH:MSECL. Then that 1ms timer tick is divided by the register

HMSEC which provides the 100ms signal used by this seconds timer. Therefore, this seconds timer can generate an interrupt

which occurs from 100ms to 12.8 seconds. Reading this register will clear the Seconds Interrupt. This Interrupt can be monitored

in the AIE register.

WRT

Write Control. Determines whether to write the value immediately or wait until the current count is finished.

bit 7

Read = 0.

0 = Delay Write Operation. The SEC value is loaded when the current count expires.

1 = Write Immediately. The counter is loaded once the CPU completes the write operation.

SECINT6-0 Seconds Count. Normal operation would use 100ms as the clock interval.

bits 6-0

Seconds Interrupt = (1 + SEC) • (HMSEC + 1) • (MSEC + 1) • tCLK.

PWDI

Watchdog Interrupt Priority. This bit controls the priority of the watchdog interrupt.

bit 4

0 = The watchdog interrupt is low priority.

1 = The watchdog interrupt is high priority.

PX5

External Interrupt 5 Priority. This bit controls the priority of external interrupt 5.

bit 3

0 = External interrupt 5 is low priority.

1 = External interrupt 5 is high priority.

PX4

External Interrupt 4 Priority. This bit controls the priority of external interrupt 4.

bit 2

0 = External interrupt 4 is low priority.

1 = External interrupt 4 is high priority.

PX3

External Interrupt 3 Priority. This bit controls the priority of external interrupt 3.

bit 1

0 = External interrupt 3 is low priority.

1 = External interrupt 3 is high priority.

PX2

External Interrupt 2 Priority. This bit controls the priority of external interrupt 2.

bit 0

0 = External interrupt 2 is low priority.

1 = External interrupt 2 is high priority.

Seconds Timer Interrupt (SECINT)

Extended Interrupt Priority (EIP)

SC1200 Datasheet(PDF) 56 Page - Texas Instruments

SC1200 Datasheet(HTML) 56 Page - Texas Instruments

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