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SC1200 Datasheet(PDF) 33 Page - Texas Instruments |
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SC1200 Datasheet(HTML) 33 Page - Texas Instruments |
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33 / 60 page ![]() MSC1200 33 SBAS289E www.ti.com SMOD Serial Port 0 Baud Rate Doubler Enable. The serial baud rate doubling function for Serial Port 0. bit 7 0: Serial Port 0 baud rate will be a standard baud rate. 1: Serial Port 0 baud rate will be double that defined by baud rate generation equation. GF1 General-Purpose User Flag 1. This is a general-purpose flag for software control. bit 3 GF0 General-Purpose User Flag 0. This is a general-purpose flag for software control. bit 2 STOP Stop Mode Select. Setting this bit will halt the oscillator and block external clocks. This bit will always read as a 0. bit 1 Exit with RESET. In this mode, internal peripherals are frozen and I/O pins are held in their current state. The ADC is frozen, but IDAC and VREF remain active. IDLE Idle Mode Select. Setting this bit will freeze the CPU, Timer 0 and 1, and the USART; other peripherals remain bit 0 active. This bit will always be read as a 0. Exit with AIE (A6H) and EWU (C6H) interrupts (refer to Figure 4 for clocks affected during IDLE). Timer/Counter Control (TCON) 7 6 5 4 3 2 1 0 Reset Value SFR 87H SMOD 0 1 1 GF1 GF0 STOP IDLE 30H TF1 Timer 1 Overflow Flag. This bit indicates when Timer 1 overflows its maximum count as defined by the current bit 7 mode. This bit can be cleared by software and is automatically cleared when the CPU vectors to the Timer 1 interrupt service routine. 0: No Timer 1 overflow has been detected. 1: Timer 1 has overflowed its maximum count. TR1 Timer 1 Run Control. This bit enables/disables the operation of Timer 1. Halting this timer will preserve the current bit 6 count in TH1, TL1. 0: Timer is halted. 1: Timer is enabled. TF0 Timer 0 Overflow Flag. This bit indicates when Timer 0 overflows its maximum count as defined by the current bit 5 mode. This bit can be cleared by software and is automatically cleared when the CPU vectors to the Timer 0 interrupt service routine. 0: No Timer 0 overflow has been detected. 1: Timer 0 has overflowed its maximum count. TR0 Timer 0 Run Control. This bit enables/disables the operation of Timer 0. Halting this timer will preserve the bit 4 current count in TH0, TL0. 0: Timer is halted. 1: Timer is enabled. IE1 Interrupt 1 Edge Detect. This bit is set when an edge/level of the type defined by IT1 is detected. If IT1 = 1, this bit 3 bit will remain set until cleared in software or the start of the External Interrupt 1 service routine. If IT1 = 0, this bit will inversely reflect the state of the INT1 pin. IT1 Interrupt 1 Type Select. This bit selects whether the INT1 pin will detect edge or level triggered interrupts. bit 2 0: INT1 is level triggered. 1: INT1 is edge triggered. IE0 Interrupt 0 Edge Detect. This bit is set when an edge/level of the type defined by IT0 is detected. If IT0 = 1, this bit 3 bit will remain set until cleared in software or the start of the External Interrupt 0 service routine. If IT0 = 0, this bit will inversely reflect the state of the INT0 pin. IT0 Interrupt 0 Type Select. This bit selects whether the INT0 pin will detect edge or level triggered interrupts. bit 2 0: INT0 is level triggered. 1: INT0 is edge triggered. Power Control (PCON) 7 6 5 4 3 2 1 0 Reset Value SFR 88H TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 00H |
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