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LAN8700 Datasheet(PDF) 70 Page - Microchip Technology

Part # LAN8700
Description  짹15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR짰 Technology in a Small Footprint
PDF  74 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN8700 Datasheet(HTML) 70 Page - Microchip Technology

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LAN8700/LAN8700i
DS00002260A-page 70
 2007-2016 Microchip Technology Inc.
Table 5-30, "Register 0 - Basic
Control"
Corrected Default value for bit 0.11 to the value of
0. This bit does not get set when the MODE[2:0]
bits are set to 110.
Section 5.4.9.2, "Mode Bus –
MODE[2:0]"
Added detail about MODE[2:0] pins having no
affect at soft reset.
Table 5-30, "Register 0 - Basic
Control"
Added note to reset description (bit 0.15).
Table 3-5, "General Signals"
AT nRST, added note that register bit values are
loaded from the Mode pins upon deassertion.
Table 7-11, "Internal Pull-Up /
Pull-Down Configurations"
Added RX_DV to table.
Table 3-1, "MII Signals"
Added note that RX_DV and RX_ER cannot be
high during reset.
Table 6-7, "100M RMII
Transmit Timing Values"
Moved parameter T8.2 from MAX column to MIN
column.
Rev. 1.1
(04-17-07)
Table 7-4, "Power
Consumption Device Only"
Changed column headings to add clarity regarding
source of current. Added Note.
Table 3-4, "Boot Strap
Configuration Inputs (Note 3-
1)"
Removed RX_CLK/REGOFF because it made
Note 3-1 false.
Table 5-40, "Register 26 -
Symbol Error Counter"
Added this table to describe the register.
Table 5-29, "SMI Register
Mapping"
Added Register 26.
Table 5-23, "Symbol Error
Counter Register 26: Vendor-
Specific"
Changed description from Reserved to Symbol
Error Counter.
Rev. 1.0
(04-04-07)
Table 5-30, “Register 0 - Basic
Control,” on page 35
Table modified: Default column for “Power Down”
and “Isolate”.
Section 4.6.3, "MII vs. RMII
Configuration," on page 21
Fixed a typo, GPO0/MII is on the 187,
COL/RMII/CRS_DV is on the 8700.
Section 8.1, "Application
Diagram," on page 63
Added support components to crystal in application
diagram circuit. also added a note to the bottom to
indicate that purpose of R5 added.
Table 5-33, “Register 3 - PHY
Identifier 2,” on page 36
Corrected reg3 values.
Section 4.9.1, "Disable the
Internal +1.8V Regulator," on
page 24
Changed paragraph to correctly reflect operation
VDDIO and VDDA latch 1.8V regulator. 1.8v strap
above VIH or below VIL.
TABLE A-1:
REVISION HISTORY (CONTINUED)
Revision Level & Date
Section/Figure/Entry
Correction



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