LAN9250 datasheet(217/421 Pages) MICROCHIP

217 / 421 page

 2015 Microchip Technology Inc.

DS00001913A-page 217

LAN9250

The advertised capabilities of the PHY are stored in the PHY Auto-Negotiation Advertisement Register (PHY_AN_ADV).

The PHY contains the ability to advertise 100BASE-TX and 10BASE-T in both full or half-duplex modes. Besides the

connection speed, the PHY can advertise remote fault indication and symmetric or asymmetric pause flow control as

defined in the IEEE 802.3 specification. The transceiver supports “Next Page” capability which is used to negotiate

Energy Efficient Ethernet functionality as well as to support software controlled pages. Many of the default advertised

capabilities of the PHY are determined via configuration straps as shown in Section 12.2.18.5, "PHY Auto-Negotiation

Advertisement Register (PHY_AN_ADV)," on page 238. Refer to Section 7.0, "Configuration Straps," on page 54 for

additional details on how to use the device configuration straps.

Once Auto-Negotiation has completed, information about the resolved link and the results of the negotiation process

are reflected in the Speed Indication bits in the PHY Special Control/Status Register (PHY_SPECIAL_CONTROL_STA-

TUS), as well as the PHY Auto-Negotiation Link Partner Base Page Ability Register (PHY_AN_LP_BASE_ABILITY).

The Auto-Negotiation protocol is a purely physical layer activity and proceeds independently of the MAC controller.

The following blocks are activated during an Auto-Negotiation session:

• Auto-Negotiation (digital)

• 100M ADC (analog)

• 100M PLL (analog)

• 100M equalizer/BLW/clock recovery (DSP)

• 10M SQUELCH (analog)

• 10M PLL (analog)

• 10M Transmitter (analog)

When enabled, Auto-Negotiation is started by the occurrence of any of the following events:

• Power-On Reset (POR)

• Hardware reset (RST#)

• PHY Software reset (via Reset Control Register (RESET_CTL), or bit 15 of the PHY Basic Control Register

(PHY_BASIC_CONTROL))

• PHY Power-down reset (Section 12.2.10, "PHY Power-Down Modes," on page 222)

• PHY Link status down (bit 2 of the PHY Basic Status Register (PHY_BASIC_STATUS) is cleared)

• Setting the PHY Basic Control Register (PHY_BASIC_CONTROL), bit 9 high (auto-neg restart)

• Digital Reset (via bit 0 of the Reset Control Register (RESET_CTL))

• Issuing an EEPROM Loader RELOAD command (Section 13.4, "EEPROM Loader," on page 290) via EEPROM

Loader run sequence

On detection of one of these events, the transceiver begins Auto-Negotiation by transmitting bursts of Fast Link Pulses

(FLP). These are bursts of link pulses from the 10M TX Driver. They are shaped as Normal Link Pulses and can pass

uncorrupted down CAT-3 or CAT-5 cable. A Fast Link Pulse Burst consists of up to 33 pulses. The 17 odd-numbered

pulses, which are always present, frame the FLP burst. The 16 even-numbered pulses, which may be present or absent,

contain the data word being transmitted. Presence of a data pulse represents a “1”, while absence represents a “0”.

The data transmitted by an FLP burst is known as a “Link Code Word.” These are defined fully in IEEE 802.3 clause 28.

In summary, the transceiver advertises 802.3 compliance in its selector field (the first 5 bits of the Link Code Word). It

advertises its technology ability according to the bits set in the PHY Auto-Negotiation Advertisement Register

(PHY_AN_ADV).

There are 4 possible matches of the technology abilities. In the order of priority these are:

• 100M Full Duplex (Highest priority)

• 100M Half Duplex

• 10M Full Duplex

• 10M Half Duplex (Lowest priority)

Note:

Auto-Negotiation is not used for 100BASE-FX mode.

Note:

Refer to Section 6.2, "Resets," on page 38 for information on these and other system resets.

LAN9250 Datasheet(PDF) 217 Page - Microchip Technology

LAN9250 Datasheet(HTML) 217 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL