LAN9250 datasheet(219/421 Pages) MICROCHIP

219 / 421 page

 2015 Microchip Technology Inc.

DS00001913A-page 219

LAN9250

In full-duplex mode, the transceiver is able to transmit and receive data simultaneously. In this mode, CRS responds

only to receive activity. The CSMA/CD protocol does not apply and collision detection is disabled.

12.2.7

HP AUTO-MDIX

HP Auto-MDIX facilitates the use of CAT-3 (10 BASE-T) or CAT-5 (100 BASE-T) media UTP interconnect cable without

consideration of interface wiring scheme. If a user plugs in either a direct connect LAN cable or a cross-over patch cable,

as shown in Figure 12-4, the transceiver is capable of configuring the TXPx/TXNx and RXPx/RXNx twisted pair pins for

correct transceiver operation.

The internal logic of the device detects the TX and RX pins of the connecting device. Since the RX and TX line pairs

are interchangeable, special PCB design considerations are needed to accommodate the symmetrical magnetics and

termination of an Auto-MDIX design.

The Auto-MDIX function is enabled using the auto_mdix_strap_1 configuration strap. Manual selection of the cross-over

can be set using the manual_mdix_strap_1 configuration strap. Software based control of the Auto-MDIX function may

be performed using the Auto-MDIX Control (AMDIXCTRL) bit of the PHY Special Control/Status Indication Register

(PHY_SPECIAL_CONTROL_STAT_IND). When AMDIXCTRL is set to 1, the Auto-MDIX capability is determined by the

Auto-MDIX Enable (AMDIXEN) and Auto-MDIX State (AMDIXSTATE) bits of the PHY Special Control/Status Indication

12.2.8

PHY MANAGEMENT CONTROL

The PHY Management Control block is responsible for the management functions of the PHY, including register access

and interrupt generation. A Serial Management Interface (SMI) is used to support registers as required by the IEEE

802.3 (Clause 22), as well as the vendor specific registers allowed by the specification. The SMI interface consists of

Note:

Auto-MDIX is not used for 100BASE-FX mode.

Note:

When operating in 10BASE-T or 100BASE-TX manual modes, the Auto-MDIX crossover time can be

extended via the Extend Manual 10/100 Auto-MDIX Crossover Time bit of the PHYEDPD NLP / Crossover

Time / EEE Configuration Register (PHY_EDPD_CFG). Refer to Section 12.2.18.12, on page 247 for addi-

tional information.

When Energy Detect Power-Down is enabled, the Auto-MDIX crossover time can be extended via the

EDPD Extend Crossover bit of the PHYEDPD NLP / Crossover Time / EEE Configuration Register

(PHY_EDPD_CFG). Refer to Section 12.2.18.12, on page 247 for additional information

FIGURE 12-4:

DIRECT CABLE CONNECTION VS. CROSS-OVER CABLE CONNECTION

TXPx

TXNx

RXPx

Not Used

RXNx

Not Used

TXPx

TXNx

RXPx

Not Used

RXNx

Not Used

Direct Connect Cable

RJ-45 8-pin straight-through

for 10BASE-T/100BASE-TX

signaling

TXPx

TXNx

RXPx

Not Used

RXNx

Not Used

TXPx

TXNx

RXPx

Not Used

RXNx

Not Used

Cross-Over Cable

RJ-45 8-pin cross-over for

10BASE-T/100BASE-TX

signaling

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