Electronic Components Datasheet Search
  English  ▼

X  

LAN9250 Datasheet(PDF) 302 Page - Microchip Technology

Part # LAN9250
Description  Integrated Ethernet PHY with HP Auto-MDIX
PDF  421 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN9250 Datasheet(HTML) 302 Page - Microchip Technology

Back Button LAN9250 Datasheet HTML 298Page - Microchip Technology LAN9250 Datasheet HTML 299Page - Microchip Technology LAN9250 Datasheet HTML 300Page - Microchip Technology LAN9250 Datasheet HTML 301Page - Microchip Technology LAN9250 Datasheet HTML 302Page - Microchip Technology LAN9250 Datasheet HTML 303Page - Microchip Technology LAN9250 Datasheet HTML 304Page - Microchip Technology LAN9250 Datasheet HTML 305Page - Microchip Technology LAN9250 Datasheet HTML 306Page - Microchip Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 302 / 421 page
background image
LAN9250
DS00001913A-page 302
 2015 Microchip Technology Inc.
Routing, 44 - Fragment, 51 - Authentication Header (AH)
• For IPv4/UDP messages, Destination IP Address checking is enabled via the RX IP Address Enable (RX_IP_AD-
DR_EN) in the 1588 Port RX Parsing Configuration Register (1588_RX_PARSE_CONFIG). Any of the IANA
assigned multicast IP destination addresses for IEEE 1588 (224.0.1.129 and 224.0.1.130 through .132), as well
as the IP destination address for the Peer Delay Mechanism (224.0.0.107) may be enabled via the 1588 Port RX
Parsing Configuration Register (1588_RX_PARSE_CONFIG). Any of these addresses are allowed for Peer delay
and non-Peer delay messages.
• For IPv6/UDP messages, Destination IP Address checking is enabled via the RX IP Address Enable (RX_IP_AD-
DR_EN) in the 1588 Port RX Parsing Configuration Register (1588_RX_PARSE_CONFIG). Any of the IANA
assigned multicast IP destination addresses for IEEE 1588 (FF0X:0:0:0:0:0:0:181 and FF0X:0:0:0:0:0:0:182
through :184), as well as the IP destination address for the Peer Delay Mechanism (FF02:0:0:0:0:0:0:6B) may be
enabled via the 1588 Port RX Parsing Configuration Register (1588_RX_PARSE_CONFIG). Any of these
addresses are allowed for Peer delay and non-Peer delay messages.
• For IPv4/UDP if the Protocol field in the fixed header was 51 (AH), the Next Header field is checked for 17 (UDP)
and the AH header is skipped.
• For IPv6/UDP if the Next Header field in the fixed header was one of the IPv6 extension header values, the Next
Header field in the extension header is checked for 17 (UDP) or one of the IPv6 extension header values. If it is
one of the IPv6 extension header values, the process repeats until either a value of 17 (UDP) or a value of 59 (No
Next Header) are found or the packet ends.
14.2.1.3
Receive Message Ingress Time Recording
Following the determination of packet format and qualification of the packet as a PTP message above, the PTP header
is checked for ALL of the following.
• The messageType field of the PTP header is checked and only those messages enabled via the RX PTP Mes-
sage Type Enable (RX_PTP_MESSAGE_EN[15:0]) bits in the 1588 Port RX Timestamp Configuration Register
(1588_RX_TIMESTAMP_CONFIG) will be have their ingress times saved. Typically Sync, Delay_Req, PDe-
lay_Req and PDelay_Resp messages are enabled.
• The versionPTP field of the PTP header is checked against the RX PTP Version (RX_PTP_VERSION[3:0]) field in
the 1588 Port RX Timestamp Configuration Register (1588_RX_TIMESTAMP_CONFIG). Only those messages
with a matching version will be have their ingress times saved. A setting of 0 allows any PTP version.
Note:
Support for the IEEE 1588-2002 (v1) packet format is not provided.
• If enabled via the RX PTP Domain Match Enable (RX_PTP_DOMAIN_EN) bit in the 1588 Port RX Timestamp
Configuration Register (1588_RX_TIMESTAMP_CONFIG), the domainNumber field of the PTP header is
checked against the RX PTP Domain (RX_PTP_DOMAIN[7:0]) value in the same register. Only those messages
with a matching domain will be have their ingress times saved.
• If enabled via the RX PTP Alternate Master Enable (RX_PTP_ALT_MASTER_EN) bit in the 1588 Port RX Time-
stamp Configuration Register (1588_RX_TIMESTAMP_CONFIG), the alternateMasterFlag in the flagField of the
PTP header is checked and only those messages with an alternateMasterFlag set to 0 will be have their ingress
times saved.
At the end of the frame, the frame’s FCS and the UDP checksum (for IPv4 and IPv6 formats) are verified. FCS checking
can be disabled using the RX PTP FCS Check Disable (RX_PTP_FCS_DIS) bit in the 1588 Port RX Timestamp Con-
figuration Register (1588_RX_TIMESTAMP_CONFIG). UDP checksum checking can be disabled using the RX PTP
UDP Checksum Check Disable (RX_PTP_UDP_CHKSUM_DIS) bit in the same register.
Note:
A IPv4 UDP checksum value of 0x0000 indicates that the checksum is not included and is considered a
pass. A IPv6 UDP checksum value of 0x0000 is invalid and is considered a fail.
Note:
For IPv6, the UDP checksum calculation includes the IPv6 Pseudo header. Part of the IPv6 Pseudo header
is the final IPv6 destination address.
If the IPv6 packet does not contain a Routing header, then the final IPv6 destination address is the destina-
tion address contained in the IPv6 header.
If the IPv6 packet does contain a Routing header, then the final IPv6 destination address is the address in
the last element of the Routing header.
Note:
The UDP checksum is calculated over the entire UDP payload as indicated by the UDP length field and not
the assumed PTP packet length.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com