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LAN9250 Datasheet(PDF) 324 Page - Microchip Technology

Part # LAN9250
Description  Integrated Ethernet PHY with HP Auto-MDIX
PDF  421 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN9250 Datasheet(HTML) 324 Page - Microchip Technology

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LAN9250
DS00001913A-page 324
 2015 Microchip Technology Inc.
14.8.3
1588 INTERRUPT STATUS REGISTER (1588_INT_STS)
This read/write register contains the 1588 interrupt status bits.
Writing a 1 to a interrupt status bits acknowledges and clears the individual interrupt. If enabled in the 1588 Interrupt
Enable Register (1588_INT_EN), these interrupt bits are cascaded into the 1588 Interrupt Event (1588_EVNT) bit of the
Interrupt Status Register (INT_STS). Status bits will still reflect the status of the interrupt source regardless of whether
the source is enabled as an interrupt. The 1588 Interrupt Event Enable (1588_EVNT_EN) bit of the Interrupt Enable
Register (INT_EN) must also be set in order for an actual system level interrupt to occur. Refer to Section 8.0, "System
Interrupts," on page 62 for additional information.
Offset:
108h
Size:
32 bits
Bank:
na
Bits
Description
Type
Default
31:24
1588 GPIO Falling Edge Interrupt (1588_GPIO_FE_INT[7:0])
This interrupt indicates that a falling event occurred and the 1588 Clock was
captured.
Note:
As 1588 capture inputs, GPIO inputs are edge sensitive and must
be low for greater than 40 ns to be recognized as interrupt inputs.
These bits can also be set due to a manual capture via 1588 Manual Capture
(1588_MANUAL_CAPTURE).
R/WC
00h
23:16
1588 GPIO Rising Edge Interrupt (1588_GPIO_RE_INT[7:0])
This interrupt indicates that a rising event occurred and the 1588 Clock was
captured.
Note:
As 1588 capture inputs, GPIO inputs are edge sensitive and must
be high for greater than 40 ns to be recognized as interrupt inputs.
These bits can also be set due to a manual capture via 1588 Manual Capture
(1588_MANUAL_CAPTURE).
R/WC
00h
15:13
RESERVED
RO
-
12
1588 TX Timestamp Interrupt (1588_TX_TS_INT)
This interrupt indicates that a PTP packet was transmitted and its egress time
stored. Up to four events, as indicated by the 1588 TX Timestamp Count
(1588_TX_TS_CNT[2:0]) field in the 1588 Port Capture Information Register
(1588_CAP_INFO), are buffered.
R/WC
0b
11:9
RESERVED
RO
-
8
1588 RX Timestamp Interrupt (1588_RX_TS_INT)
This interrupt indicates that a PTP packet was received and its ingress time
and associated data stored. Up to four events, as indicated by the 1588 RX
Timestamp Count (1588_RX_TS_CNT[2:0]) field in the 1588 Port Capture
Information Register (1588_CAP_INFO), are buffered.
R/WC
0b
7:2
RESERVED
RO
-



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