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LAN9250 Datasheet(PDF) 411 Page - Microchip Technology |
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LAN9250 Datasheet(HTML) 411 Page - Microchip Technology |
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411 / 421 page ![]() 2015 Microchip Technology Inc. DS00001913A-page 411 LAN9250 19.6.4 POWER-ON AND CONFIGURATION STRAP TIMING This diagram illustrates the configuration strap valid timing requirements in relation to power-on. In order for valid con- figuration strap values to be read at power-on, the following timing requirements must be met. Note: Configuration straps must only be pulled high or low. Configuration straps must not be driven as inputs. Device configuration straps are also latched as a result of RST# assertion. Refer to Section 19.6.3, "Reset and Config- uration Strap Timing" and Section 6.2.1, "Chip-Level Resets," on page 39 for additional details. FIGURE 19-5: POWER-ON CONFIGURATION STRAP LATCHING TIMING TABLE 19-12: POWER-ON CONFIGURATION STRAP LATCHING TIMING VALUES Symbol Description Min Typ Max Units tcfg Configuration strap valid time - - 15 ms All External Power Supplies Configuration Straps tcfg Vopp |
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