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LAN9250 Datasheet(PDF) 201 Page - Microchip Technology |
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LAN9250 Datasheet(HTML) 201 Page - Microchip Technology |
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201 / 421 page  2015 Microchip Technology Inc. DS00001913A-page 201 LAN9250 11.15.7 HOST MAC MII DATA REGISTER (HMAC_MII_DATA) This read/write register is used in conjunction with the Host MAC MII Access Register (HMAC_MII_ACC) to access the internal PHY registers. This register contains either the data to be written to the PHY register specified in the HMAC_MII_ACC Register, or the read data from the PHY register whose index is specified in the HMAC_MII_ACC Reg- ister. The MII Busy (MIIBZY) bit in the Host MAC MII Access Register (HMAC_MII_ACC) must be cleared when writing to this register. Offset: 07h Size: 32 bits Bits Description Type Default 31:16 RESERVED RO - 15:0 MII Data This field contains the 16-bit value read from the PHY read operation or the 16-bit data value to be written to the PHY before an MII write operation. R/W 0000h |
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