| Electronic Components Datasheet Search |
|
LAN9250 Datasheet(PDF) 203 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
LAN9250 Datasheet(HTML) 203 Page - Microchip Technology |
|
203 / 421 page ![]() 2015 Microchip Technology Inc. DS00001913A-page 203 LAN9250 0 Flow Control Busy (FCBSY) In full-duplex mode, this bit indicates that the Host MAC is in the process of sending a PAUSE control frame. This bit is set by the automatic flow control function. During the transmission of the control frame, this bit continues to be set, sig- nifying that a frame transmission is in progress. After the PAUSE control frame’s transmission is complete, the Host MAC resets the bit to 0. The host software should read a logical 0 from this bit before writing to the Host MAC Flow Control (HMAC_FLOW) register. R/W SC 0b Bits Description Type Default |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |