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DS26401 Datasheet(PDF) 136 Page - Dallas Semiconductor |
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DS26401 Datasheet(HTML) 136 Page - Dallas Semiconductor |
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136 / 309 page  DS26401 Octal T1/E1/J1 Framer 136 9.17.1 Transmit HDLC FIFO Control Control of the transmit FIFO is accomplished via the Transmit HDLC FIFO Control (THFC). The FIFO Control register sets the watermarks for the receive FIFO. When the transmit FIFO empties below the low watermark, the TLWM bit in the appropriate HDLC status register will be set. TLWM is a real-time bit and remains set as long as the transmit FIFO’s write pointer is below the watermark. If enabled, this condition can also cause an interrupt via the INT pin. Register Name: THFC Register Description: Transmit HDLC FIFO Control Register Register Address: 187h + (200h x n) : where n = 0 to 7, for Ports 1 to 8 Bit # 7 6 5 4 3 2 1 0 Name — — — — — — TFLWM1 TFLWM0 Default 0 0 0 0 0 0 0 0 Bit 0 to Bit 1 / Transmit HDLC FIFO Low Watermark Select (TFLWM0 to TFLWM1) TFLWM1 TFLWM0 Transmit FIFO Watermark 0 0 4 bytes 0 1 16 bytes 1 0 32 bytes 1 1 48 bytes Bits 2 to 7 / Unused. Must be set = 0 for proper operation. |
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