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DS26401 Datasheet(PDF) 157 Page - Dallas Semiconductor |
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DS26401 Datasheet(HTML) 157 Page - Dallas Semiconductor |
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157 / 309 page ![]() DS26401 Octal T1/E1/J1 Framer 157 10.4 Interrupt Information Registers The Interrupt Information Registers provide an indication of which DS26401 Status Registers are generating an interrupt. When an interrupt occurs, the host can read RIIR to quickly identify which of the 6 E1 receive status registers are causing the interrupt. The Interrupt Information Register bits will clear once the appropriate interrupt has been serviced and cleared, as long as no other interrupt condition is present in the associated status register. Status bits that have been masked via the Receive Interrupt Mask (RIMx) registers, will also be masked from the IIR registers. Register Name: RIIR Register Description: Receive Interrupt Information Register Register Address: 09Fh + (200h x n) : where n = 0 to 7, for Ports 1 to 8 Bit # 7 6 5 4 3 2 1 0 Name RLS6 RLS5 RLS4 RLS3 RLS2 RLS1 Default 0 0 0 0 0 0 0 0 |
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