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DS26401 Datasheet(PDF) 159 Page - Dallas Semiconductor

Part # DS26401
Description  Octal T1/E1/J1 Framer
PDF  309 Pages
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Manufacturer  DALLAS [Dallas Semiconductor]
Direct Link  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS26401 Datasheet(HTML) 159 Page - Dallas Semiconductor

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DS26401 Octal T1/E1/J1 Framer
159
Table 10-1. E1 Sync/Resync Criteria
FRAME OR
MULTIFRAME
LEVEL
SYNC CRITERIA
RESYNC CRITERIA
ITU SPEC.
FAS
FAS present in frame N and N
+ 2, and FAS not present in
frame N + 1
Three consecutive incorrect
FAS received
Alternate: (RCR1.2 = 1) The
above criteria is met or three
consecutive incorrect bit 2 of
non-FAS received
G.706
4.1.1 and 4.1.2
CRC4
Two valid MF alignment words
found within 8 ms
915 or more CRC4 code words
out of 1000 received in error
G.706
4.2 and 4.3.2
CAS
Valid MF alignment word
found.
Alternate: (RSIGC.4 = 1)
Valid MF alignment word
found and previous time slot
16 contains code other than all
zeros.
Two consecutive MF alignment
words received in error or for a
period of 1 multiframe, all the
bits in time slot 16 are zero.
Alternate: (RSIGC.4 = 1) The
above criteria is met or 1
multiframe is received with all
bits in time slot 16 set to 0.
G.732 5.2
Register Name:
RCR2
Register Description:
Receive Control Register 2
Register Address:
082h + (200h x n) : where n = 0 to 7, for Ports 1 to 8
Bit #
7
6
5
4
3
2
1
0
Name
—
—
—
—
—
—
—
RLOSA
Default
0
0
0
0
0
0
0
0
Bit 0 / Receive Loss of Signal Alternate Criteria (RLOSA).
Defines the criteria for an LOS condition.
0 = LOS declared upon 255 consecutive zeros (125
ms)
1 = LOS declared upon 2048 consecutive zeros (1ms)
Bits 1 to 7/ Unused. Must be set = 0 for proper operation.



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