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DS26401 Datasheet(PDF) 161 Page - Dallas Semiconductor |
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DS26401 Datasheet(HTML) 161 Page - Dallas Semiconductor |
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161 / 309 page ![]() DS26401 Octal T1/E1/J1 Framer 161 Register Name: RIOCR Register Description: Receive I/O Configuration Register Register Address: 084h + (200h x n) : where n = 0 to 7, for Ports 1 to 8 Bit # 7 6 5 4 3 2 1 0 Name RCLKINV RSYNCINV H100EN RSCLKM — RSIO RSMS2 RSMS1 Default 0 0 0 0 0 0 0 0 Bit 0 / RSYNC Mode Select 1 (RSMS1). Selects frame or multiframe pulse when RSYNC pin is in output mode. In input mode (elastic store must be enabled) multiframe mode is only useful when receive signaling reinsertion is enabled. 0 = frame mode 1 = multiframe mode Bit 1 / RSYNC Mode Select 2 (RSMS2) T1: RSYNC pin must be programmed in the output frame mode 0 = do not pulse double wide in signaling frames 1 = do pulse double wide in signaling frames E1: RSYNC pin must be programmed in the output multiframe mode 0 = RSYNC outputs CAS multiframe boundaries 1 = RSYNC outputs CRC4 multiframe boundaries Bit 2 / RSYNC I/O Select (RSIO). (Note: This bit must be set to zero when elastic store is disabled.) 0 = RSYNC is an output 1 = RSYNC is an input (only valid if elastic store enabled) Bit 3 / Unused. Must be set = 0 for proper operation. Bit 4 / RSYSCLK Mode Select (RSCLKM) 0 = if RSYSCLK is 1.544MHz 1 = if RSYSCLK is 2.048MHz or IBO enabled Bit 5 / H.100 SYNC Mode (H100EN). See Section 10.6. 0 = Normal operation 1 = RSYNC and TSSYNC shifted Bit 6 / RSYNC Invert (RSYNCINV) 0 = No inversion 1 = Invert RSYNC as either input or output Bit 7 / RCLK Invert (RCLKINV) 0 = No inversion 1 = Invert RCLK input |
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