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DS26401 Datasheet(PDF) 165 Page - Dallas Semiconductor |
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DS26401 Datasheet(HTML) 165 Page - Dallas Semiconductor |
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165 / 309 page ![]() DS26401 Octal T1/E1/J1 Framer 165 Table 10-2. E1 Alarm Criteria ALARM SET CRITERIA CLEAR CRITERIA ITU SPEC. RLOF An RLOF condition exist on power up prior to initial synchronization, when a resync criteria has been met, or when a manual resync has been initiated via RCR1.0 RLOS 255 or 2048 consecutive zeros received as determined by RCR2.0 In 255-bit times, at least 32 ones are received G.775/G.962 RRAI Bit 3 of non-align frame set to one for three consecutive occasions Bit 3 of non-align frame set to zero for three consecutive occasions O.162 RAIS Fewer than three zeros in two frames (512 bits) More than two zeros in two frames (512 bits) O.162 RDMA Bit 6 of time slot 16 in frame 0 has been set for two consecutive multiframes V52LNK 2 out of 3 Sa7 bits are zero G.965 Register Name: RRTS1 Register Description: Receive Real-Time Status Register 1 Register Address: 0B0h + (200h x n) : where n = 0 to 7, for Ports 1 to 8 Bit # 7 6 5 4 3 2 1 0 Name — — — — RRAI RAIS RLOS RLOF Default 0 0 0 0 0 0 0 0 All bits in this register are real-time (not latched). Bit 0 / Receive Loss of Frame Condition (RLOF). Set when the DS26401 is not synchronized to the received data stream. Bit 1 / Receive Loss of Signal Condition (RLOS). Set when 255 (or 2048 if RCR2.0 = 1) consecutive zeros have been detected at RPOS and RNEG. Bit 2 / Receive Alarm Indication Signal Condition (RAIS). Set when an unframed all one’s code is received at RPOS and RNEG. Bit 3 / Receive Remote Alarm Indication Condition (RRAI). Set when a remote alarm is received at RPOS and RNEG. Bits 4 to 7 / Unused |
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