DS26401 datasheet(169/309 Pages) DALLAS

169 / 309 page

DS26401 Octal T1/E1/J1 Framer

169

RIM2

Receive Interrupt Mask Register 2

0A1h + (200h x n) : where n = 0 to 7, for Ports 1 to 8

Bit #

Name

—

RSA1

RSA0

RCMF

RAF

Default

Bit 0 / Receive Align Frame Event (RAF)

0 = interrupt masked

1 = interrupt enabled

Bit 1 / Receive CRC4 Multiframe Event (RCMF)

0 = interrupt masked

1 = interrupt enabled

Bit 2 / Receive Signaling All Zeros Event (RSA0)

0 = interrupt masked

1 = interrupt enabled

Bit 3 / Receive Signaling All Ones Event (RSA1)

0 = interrupt masked

1 = interrupt enabled

Bits 4 to 7 / Unused. Must be set = 0 for proper operation.

RRTS3

Receive Real-Time Status Register 3

0B2h + (200h x n) : where n = 0 to 7, for Ports 1 to 8

Bit #

Name

—

LORC

—

V52LNK

RDMA

Default

All bits in this register are real-time (not latched).

Bit 0 / Receive Distant MF Alarm Condition (RDMA).

Set when bit-6 of time slot 16 in frame 0 has been set for

two consecutive multiframes. This alarm is not disabled in the CCS signaling mode.

Bit 1 / V5.2 Link Detected Condition (V52LNK).

Set on detection of a V5.2 link identification signal. (G.965).

Bits 2, 4 to 7 / Unused.

Bit 3 / Loss of Receive Clock Condition (LORC).

Set when the RCLK pin has not transitioned for one channel

time.

DS26401 Datasheet(PDF) 169 Page - Dallas Semiconductor

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